The present invention relates to the fabrication of integrated circuit devices such as LSI or VLSI semiconductor chips, and more particularly to plasma etch processes designed to define microscopic patterns in such devices.
Many dry etching processes for etching silicon are known, typically involving plasmas in the reactive ion etch (RIE) regime of relatively low pressure, approximately 30-100 microns, and low power density, about 0.01-0.5 watt/cm.sup.2. Recently, much attention has been directed in the semiconductor industry to plasma etching using high pressure, 1 torr and above, and high power density, 2-10 watt/cm.sup.2, resulting in substantially higher etch rates than previously possible.
In plasma etch processes, two removal components contribute to form the resulting etch profile in the target film: a chemical component, due to the chemical reaction of the plasma generated species with the surface material to be removed, and a physical component, due to the momentum transfer of the charged particles formed in the plasma and accelerated through the sheath to the target material. Plasma etch processes carried out in the high pressure regime are distinguished by the much greater importance of the chemical component in etching than in the low pressure RIE processes.
In the conventional fluorinated gas chemistry, as exemplified by U.S. Pat. No. 4,310,380 to Flamm et al., etching is isotropic in nature, with comparable lateral and vertical etch rates in silicon. In the disclosed process the chemical component of the readily dissociated NF.sub.3 ambient is very strong, even in the low pressure RIE type process, where one would normally expect a greater vertical etch rate than lateral rate due to the strength of the physical bombardment. In a high pressure regime, such a gas chemistry will become even more isotropic. While isotropic etching is useful in some silicon etch steps, it is not desirable where deep etching of silicon (3 to 5 microns) of small dimensions is required, such as in isolation trench etching. In such a process, a trench is etched around a transistor or other device which is then filled with a dielectric material to electrically isolate the device. The trench cuts vertically through several layers of differently doped polysilicon or silicon. An etch plasma which uses chlorinated gases to control undercut will undercut each layer a different amount depending on that layer's reactivity with fluorine and chlorine. These and other problems are overcome by the present invention.